Features for the CDCLVP2104EVM
- Easy-to-use evaluation board to fan out low phase noise clocks
- Easy device setup
- Fast configuration
- Control pins configurable through jumpers
- Board powered at +2.5-V/+3.3-V
- Single-ended or differential input clocks
- CDCLVP2104 supports eight LVPECL outputs; CDCLVP2104EVM supports four LVPECL outputs
Description for the CDCLVP2104EVM
The CDCLVP2104 is a high-performance, low additive phase noise clock buffer. It has two universal input buffers that support either single-ended or differential clock inputs. Each input feeds a bank of four LVPECL outputs. The device also features on-chip bias generators that can provide the LVPECL common-mode voltage to the device inputs. This evaluation module (EVM) is designed to demonstrate the electrical performance of the CDCLVP2104. This fully assembled and factory-tested evaluation board allows complete validation of the CDCLVP2104 device functionalities. For optimum performance, the board is equipped with 50-ohm SMA connectors and well-controlled, 50-ohm impedance microstrip transmission lines.