Technical Document
Specifications
Brand
Texas InstrumentsLogic Family
ALVC
Logic Function
Bus Transceiver
Number of Elements per Chip
2
Number of Channels per Chip
16
Polarity
Non-Inverting
Mounting Type
Surface Mount
Package Type
SSOP
Pin Count
48
Input Level
LVTTL
Output Level
LVTTL
Maximum High Level Output Current
-24mA
Maximum Low Level Output Current
24mA
Maximum Propagation Delay Time @ Maximum CL
5.8 ns@ 5 V
Maximum Operating Temperature
+85 °C
Length
15.88mm
Maximum Operating Supply Voltage
3.6 V, 5.5 V
Width
7.49mm
Minimum Operating Supply Voltage
2.3 V, 3 V
Height
2.59mm
Dimensions
15.88 x 7.49 x 2.59mm
Propagation Delay Test Condition
50pF
Minimum Operating Temperature
-40 °C
Product details
74ALVC Family, Texas Instruments
Advanced Low-Voltage CMOS logic
Operating voltage: 1.65 to 3.6
Compatibility: Input CMOS, Output CMOS
Latch-up performance exceeds 250 mA per JESD 17
74ALVC Family
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€ 4.044
Each (In a Pack of 5) (Exc. Vat)
5
€ 4.044
Each (In a Pack of 5) (Exc. Vat)
5
Buy in bulk
Quantity | Unit price | Per Pack |
---|---|---|
5 - 20 | € 4.044 | € 20.22 |
25 - 45 | € 3.841 | € 19.20 |
50 - 120 | € 3.456 | € 17.28 |
125 - 245 | € 3.113 | € 15.56 |
250+ | € 2.954 | € 14.77 |
Technical Document
Specifications
Brand
Texas InstrumentsLogic Family
ALVC
Logic Function
Bus Transceiver
Number of Elements per Chip
2
Number of Channels per Chip
16
Polarity
Non-Inverting
Mounting Type
Surface Mount
Package Type
SSOP
Pin Count
48
Input Level
LVTTL
Output Level
LVTTL
Maximum High Level Output Current
-24mA
Maximum Low Level Output Current
24mA
Maximum Propagation Delay Time @ Maximum CL
5.8 ns@ 5 V
Maximum Operating Temperature
+85 °C
Length
15.88mm
Maximum Operating Supply Voltage
3.6 V, 5.5 V
Width
7.49mm
Minimum Operating Supply Voltage
2.3 V, 3 V
Height
2.59mm
Dimensions
15.88 x 7.49 x 2.59mm
Propagation Delay Test Condition
50pF
Minimum Operating Temperature
-40 °C
Product details
74ALVC Family, Texas Instruments
Advanced Low-Voltage CMOS logic
Operating voltage: 1.65 to 3.6
Compatibility: Input CMOS, Output CMOS
Latch-up performance exceeds 250 mA per JESD 17