CLC001

ACTIVE

3.3-V ground reference SEMPTE 259M cable driver

Product details

Function Cable driver Supply voltage (V) 3.3 Power consumption (mW) 230 Data rate (max) (Mbps) 622 Control interface Pin Operating temperature range (°C) -40 to 85
Function Cable driver Supply voltage (V) 3.3 Power consumption (mW) 230 Data rate (max) (Mbps) 622 Control interface Pin Operating temperature range (°C) -40 to 85
SOIC (D) 8 29.4 mm² 4.9 x 6
  • Adjustable output amplitude
  • Differential input and output
  • Accepts LVPECL or LVDS input swings
  • Low power dissipation
  • Single +3.3V supply

  • Adjustable output amplitude
  • Differential input and output
  • Accepts LVPECL or LVDS input swings
  • Low power dissipation
  • Single +3.3V supply

The CLC001 is a monolithic, high-speed cable driver designed for use in SMPTE 259M serial digital video and ITU-T G.703 serial digital data transmission applications. The CLC001 drives 75 transmission lines (Belden 8281 or equivalent) at data rates up to 622 Mbps. Controlled output rise and fall times (400 ps typical) minimize transition-induced jitter. The output voltage swing is adjustable from 800 mVp-p to 1.0 Vp-p using an external resistor.

The CLC001's output stage consumes less power than other designs. The differential inputs accept LVDS signal levels, LVPECL levels directly or PECL with attenuation networks.

All these make the CLC001 an excellent general purpose high speed driver for high-speed, long distance data transmission applications.

The CLC001 is powered from a single +3.3V supply and comes in a small 8-pin SOIC package.


Key Specifications

  • 400 ps rise and fall times
  • Data rates to 622 Mbps
  • 100 mV differential input threshold
  • Low residual jitter

The CLC001 is a monolithic, high-speed cable driver designed for use in SMPTE 259M serial digital video and ITU-T G.703 serial digital data transmission applications. The CLC001 drives 75 transmission lines (Belden 8281 or equivalent) at data rates up to 622 Mbps. Controlled output rise and fall times (400 ps typical) minimize transition-induced jitter. The output voltage swing is adjustable from 800 mVp-p to 1.0 Vp-p using an external resistor.

The CLC001's output stage consumes less power than other designs. The differential inputs accept LVDS signal levels, LVPECL levels directly or PECL with attenuation networks.

All these make the CLC001 an excellent general purpose high speed driver for high-speed, long distance data transmission applications.

The CLC001 is powered from a single +3.3V supply and comes in a small 8-pin SOIC package.


Key Specifications

  • 400 ps rise and fall times
  • Data rates to 622 Mbps
  • 100 mV differential input threshold
  • Low residual jitter

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Technical documentation

Design & development

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Simulation model

CLC001 IBIS Model

SNLM003.ZIP (5 KB) - IBIS Model
Simulation tool

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SOIC (D) 8 View options

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