Product details

Technology family LV-A Function Digital Multiplexer Configuration 2:1 Number of channels 4 Operating temperature range (°C) -40 to 85 Rating Catalog
Technology family LV-A Function Digital Multiplexer Configuration 2:1 Number of channels 4 Operating temperature range (°C) -40 to 85 Rating Catalog
SOIC (D) 16 59.4 mm² 9.9 x 6 SOP (NS) 16 79.56 mm² 10.2 x 7.8 SSOP (DB) 16 48.36 mm² 6.2 x 7.8 TSSOP (PW) 16 32 mm² 5 x 6.4 TVSOP (DGV) 16 23.04 mm² 3.6 x 6.4
  • Operates 2 V to 5.5 V VCC
  • Inputs accept voltages to 5.5 V
  • Max tpd of 7.5 ns at 5 V
  • Typical VOLP (Output Ground Bounce) < 0.8 V at VCC, TA = 25°C
  • Typical VOHV (Output VOH Undershoot) > 2 V at VCC, TA = 25°C
  • Latch-up performance exceeds 100 mA per JESD 78, Class II
  • Operates 2 V to 5.5 V VCC
  • Inputs accept voltages to 5.5 V
  • Max tpd of 7.5 ns at 5 V
  • Typical VOLP (Output Ground Bounce) < 0.8 V at VCC, TA = 25°C
  • Typical VOHV (Output VOH Undershoot) > 2 V at VCC, TA = 25°C
  • Latch-up performance exceeds 100 mA per JESD 78, Class II

2 V to 5.5 V VCC operation.

2 V to 5.5 V VCC operation.

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Technical documentation

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* Data sheet SN74LV157A Quadruple 2-Line to 1-Line Data Selectors/Multiplexers datasheet (Rev. G) PDF | HTML 16 Mar 2023

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Evaluation board

14-24-LOGIC-EVM — Logic product generic evaluation module for 14-pin to 24-pin D, DB, DGV, DW, DYY, NS and PW packages

The 14-24-LOGIC-EVM evaluation module (EVM) is designed to support any logic device that is in a 14-pin to 24-pin D, DW, DB, NS, PW, DYY or DGV package,

User guide: PDF | HTML
Not available on TI.com
Simulation model

SN74LV157A PSpice Transient Model

SCLM121.ZIP (41 KB) - PSpice Model
Package Pins Download
SOIC (D) 16 View options
SOP (NS) 16 View options
SSOP (DB) 16 View options
TSSOP (PW) 16 View options
TVSOP (DGV) 16 View options

Ordering & quality

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Information included:
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Support & training

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