Product details

Technology family ACT Supply voltage (min) (V) 4.5 Supply voltage (max) (V) 5.5 Number of channels 6 IOL (max) (mA) 24 IOH (max) (mA) -24 Supply current (max) (µA) 20 Input type TTL-Compatible CMOS Output type Push-Pull Features Balanced outputs, Input clamp diode, Very high speed (tpd 5-10ns) Rating Catalog Operating temperature range (°C) -40 to 85
Technology family ACT Supply voltage (min) (V) 4.5 Supply voltage (max) (V) 5.5 Number of channels 6 IOL (max) (mA) 24 IOH (max) (mA) -24 Supply current (max) (µA) 20 Input type TTL-Compatible CMOS Output type Push-Pull Features Balanced outputs, Input clamp diode, Very high speed (tpd 5-10ns) Rating Catalog Operating temperature range (°C) -40 to 85
PDIP (N) 14 181.42 mm² 19.3 x 9.4 SOIC (D) 14 51.9 mm² 8.65 x 6 SOP (NS) 14 79.56 mm² 10.2 x 7.8 SSOP (DB) 14 48.36 mm² 6.2 x 7.8 TSSOP (PW) 14 32 mm² 5 x 6.4
  • VCC operation of 4.5 V to 5.5 V
  • Inputs accept voltages to 5.5 V
  • Max tpd of 8.5 ns at 5 V
  • Inputs are TTL-voltage compatible
  • VCC operation of 4.5 V to 5.5 V
  • Inputs accept voltages to 5.5 V
  • Max tpd of 8.5 ns at 5 V
  • Inputs are TTL-voltage compatible

The ‘ACT04 devices contain six independent inverters. The devices perform the Boolean function Y = A.

The ‘ACT04 devices contain six independent inverters. The devices perform the Boolean function Y = A.

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Technical documentation

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Type Title Date
* Data sheet SNx4ACT04 Hex Inverters datasheet (Rev. D) PDF | HTML 31 Jan 2023
Application note Implications of Slow or Floating CMOS Inputs (Rev. E) 26 Jul 2021
Selection guide Logic Guide (Rev. AB) 12 Jun 2017
Application note Understanding and Interpreting Standard-Logic Data Sheets (Rev. C) 02 Dec 2015
User guide LOGIC Pocket Data Book (Rev. B) 16 Jan 2007
Application note Semiconductor Packing Material Electrostatic Discharge (ESD) Protection 08 Jul 2004
Application note Selecting the Right Level Translation Solution (Rev. A) 22 Jun 2004
Application note TI IBIS File Creation, Validation, and Distribution Processes 29 Aug 2002
Application note CMOS Power Consumption and CPD Calculation (Rev. B) 01 Jun 1997
Application note Designing With Logic (Rev. C) 01 Jun 1997
Application note Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc 01 Apr 1996

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Evaluation board

14-24-LOGIC-EVM — Logic product generic evaluation module for 14-pin to 24-pin D, DB, DGV, DW, DYY, NS and PW packages

The 14-24-LOGIC-EVM evaluation module (EVM) is designed to support any logic device that is in a 14-pin to 24-pin D, DW, DB, NS, PW, DYY or DGV package,

User guide: PDF | HTML
Not available on TI.com
Simulation model

SN74ACT04 Behavioral SPICE Model

SCAM129.ZIP (7 KB) - PSpice Model
Simulation model

SN74ACT04 IBIS Model

SCAM029.ZIP (15 KB) - IBIS Model
Package Pins Download
PDIP (N) 14 View options
SOIC (D) 14 View options
SOP (NS) 14 View options
SSOP (DB) 14 View options
TSSOP (PW) 14 View options

Ordering & quality

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Support & training

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