Product details

Technology family TTL Supply voltage (min) (V) 4.5 Supply voltage (max) (V) 5.5 Input type TTL Output type TTL Operating temperature range (°C) -55 to 125 Rating Military
Technology family TTL Supply voltage (min) (V) 4.5 Supply voltage (max) (V) 5.5 Input type TTL Output type TTL Operating temperature range (°C) -55 to 125 Rating Military
CDIP (J) 14 130.4652 mm² 19.56 x 6.67 CFP (W) 14 58.023 mm² 9.21 x 6.3
  • Packages Options Include Plastic and Ceramic DIPs and Ceramic Flat Packages
  • Dependable Texas Instruments Quality and Reliability
  • Packages Options Include Plastic and Ceramic DIPs and Ceramic Flat Packages
  • Dependable Texas Instruments Quality and Reliability

These J-K flip-flops are based on the master-slave principle and each has AND gate inputs for entry into the master section which are controlled by the clock pulse. The clock pulse also regulates the state of the coupling transistors which connect the master and slave sections. The sequence of operation is as follows:

  • 1. Isolate slave from master
  • 2. Enter information from AND gate inputs to master
  • 3. Disable AND gate inputs
  • 4. Transfer information from master to slave

The logical states of the J and K inputs must not be allowed to change when the clock pulse is in a high state.

The SN5472, and the SN54H72 are characterized for operation over the full military temperature range of -55°C to 125°C. The SN7472 is characterized for operation from 0°C to 70°C.

These J-K flip-flops are based on the master-slave principle and each has AND gate inputs for entry into the master section which are controlled by the clock pulse. The clock pulse also regulates the state of the coupling transistors which connect the master and slave sections. The sequence of operation is as follows:

  • 1. Isolate slave from master
  • 2. Enter information from AND gate inputs to master
  • 3. Disable AND gate inputs
  • 4. Transfer information from master to slave

The logical states of the J and K inputs must not be allowed to change when the clock pulse is in a high state.

The SN5472, and the SN54H72 are characterized for operation over the full military temperature range of -55°C to 125°C. The SN7472 is characterized for operation from 0°C to 70°C.

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Technical documentation

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Type Title Date
* Data sheet AND-Gated J-K Master-Slave Flip-Flops With Preset And Clear datasheet 01 Mar 1988
Application note Power-Up Behavior of Clocked Devices (Rev. B) PDF | HTML 15 Dec 2022
Selection guide Logic Guide (Rev. AB) 12 Jun 2017
Application note Understanding and Interpreting Standard-Logic Data Sheets (Rev. C) 02 Dec 2015
User guide LOGIC Pocket Data Book (Rev. B) 16 Jan 2007
Application note Semiconductor Packing Material Electrostatic Discharge (ESD) Protection 08 Jul 2004
Application note Designing With Logic (Rev. C) 01 Jun 1997
Application note Input and Output Characteristics of Digital Integrated Circuits 01 Oct 1996
Application note Live Insertion 01 Oct 1996

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CDIP (J) 14 View options
CFP (W) 14 View options

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