The PLL1707 and PLL1708 use the same die and they are electrically identical except for mode control.
The PLL1707 are low cost, phase-locked
loop (PLL) multiclock generators. The PLL1707 and
PLL1708 can generate four system clocks from a 27-MHz
reference input frequency. The clock outputs of the
PLL1707 can be controlled by sampling frequency-control
pins and those of the PLL1708 can be controlled through
serial-mode control pins. The device gives customers both
cost and space savings by eliminating external
components and enables customers to achieve the very
low-jitter performance needed for high performance audio
DACs and/or ADCs. The PLL1707 and PLL1708 are ideal
for MPEG-2 applications which use a 27-MHz master
clock such as DVD recorders, HDD recorders, DVD
add-on cards for multimedia PCs, digital HDTV systems,
and set-top boxes.
| Type | Title | Date | ||
|---|---|---|---|---|
| * | Data sheet | 3.3 V Dual PLL Multi-Clock Generator datasheet | 02 Dec 2002 |
For additional terms or required resources, click any title below to view the detail page where available.
| Package | Pins | Download |
|---|---|---|
| SSOP (DBQ) | 20 | View options |
Content is provided "as is" by TI and community contributors and does not constitute TI specifications. See terms of use.
If you have questions about quality, packaging or ordering TI products, see TI support.