GD65232

ACTIVE

5-V multichannel 120kbps RS-232 line driver/receiver with +/-7.5V output & +/-1.5-kV ESD protection

Product details

Drivers per package 3 Receivers per package 5 Logic voltage (min) (V) 5 Data rate (max) (Mbps) 0.12 Main supply voltage (nom) (V) 5 ESD HBM (kV) 1.5 Rating Catalog Operating temperature range (°C) -40 to 85 Vout (typ) (V) 7.5
Drivers per package 3 Receivers per package 5 Logic voltage (min) (V) 5 Data rate (max) (Mbps) 0.12 Main supply voltage (nom) (V) 5 ESD HBM (kV) 1.5 Rating Catalog Operating temperature range (°C) -40 to 85 Vout (typ) (V) 7.5
SOIC (DW) 20 131.84 mm² 12.8 x 10.3 TSSOP (PW) 20 41.6 mm² 6.5 x 6.4
  • Single Chip With Easy Interface Between UART and
    Serial-Port Connector of IBM™ PC/AT and Compatibles
  • Meet or Exceed the Requirements of TIA/EIA-232-F and ITU v.28 Standards
  • Designed to Support Data Rates up to 120 kbit/s
  • Pinout Compatible With SN75C185 and SN75185

  • Single Chip With Easy Interface Between UART and
    Serial-Port Connector of IBM™ PC/AT and Compatibles
  • Meet or Exceed the Requirements of TIA/EIA-232-F and ITU v.28 Standards
  • Designed to Support Data Rates up to 120 kbit/s
  • Pinout Compatible With SN75C185 and SN75185

The GD65232 and GD75232 combine three drivers and five receivers from the Texas Instruments trade-standard SN75188 and SN75189 bipolar quadruple drivers and receivers, respectively. The pinout matches the flow-through design of the SN75C185 to decrease the part count, reduce the board space required, and allow easy interconnection of the UART and serial-port connector of an IBM. PC/AT and compatibles. The bipolar circuits and processing of the GD65232 and GD75232 provide a rugged, low-cost solution for this function at the expense of quiescent power and external passive components relative to the SN75C185.

The GD65232 and GD75232 comply with the requirements of the TIA/EIA-232-F and ITU (formerly CCITT) V.28 standards. These standards are for data interchange between a host computer and a peripheral at signaling rates up to 20 kbit/s. The switching speeds of these devices are fast enough to support rates up to 120 kbit/s with lower capacitive loads (shorter cables). Interoperability at the higher signaling rates cannot be expected unless the designer has design control of the cable and the interface circuits at both ends. For interoperability at signaling rates up to 120 kbit/s, use of TIA/EIA-423-B (ITU V.10) and TIA/EIA-422-B (ITU V.11) standards is recommended.

The GD65232 and GD75232 combine three drivers and five receivers from the Texas Instruments trade-standard SN75188 and SN75189 bipolar quadruple drivers and receivers, respectively. The pinout matches the flow-through design of the SN75C185 to decrease the part count, reduce the board space required, and allow easy interconnection of the UART and serial-port connector of an IBM. PC/AT and compatibles. The bipolar circuits and processing of the GD65232 and GD75232 provide a rugged, low-cost solution for this function at the expense of quiescent power and external passive components relative to the SN75C185.

The GD65232 and GD75232 comply with the requirements of the TIA/EIA-232-F and ITU (formerly CCITT) V.28 standards. These standards are for data interchange between a host computer and a peripheral at signaling rates up to 20 kbit/s. The switching speeds of these devices are fast enough to support rates up to 120 kbit/s with lower capacitive loads (shorter cables). Interoperability at the higher signaling rates cannot be expected unless the designer has design control of the cable and the interface circuits at both ends. For interoperability at signaling rates up to 120 kbit/s, use of TIA/EIA-423-B (ITU V.10) and TIA/EIA-422-B (ITU V.11) standards is recommended.

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* Data sheet GD65232, GD75232 datasheet (Rev. J) 09 Nov 2004

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SOIC (DW) 20 View options
TSSOP (PW) 20 View options

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