Product details

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PDIP (N) 16 181.42 mm² 19.3 x 9.4 SOIC (D) 16 59.4 mm² 9.9 x 6
  • Buffered Inputs
  • Exceeds 2kV ESD Protection MIL-STD-883, Method 3015
  • SCR-Latchup-Resistant CMOS Process and Circuit Design
  • Speed of Bipolar FAST™/AS/S with Significantly Reduced Power Consumption
  • Balanced Propagation Delays
  • AC Types Feature 1.5V to 5.5V Operation and Balanced Noise Immunity at 30% of the Supply
  • ±24mA Output Drive Current
    - Fanout to 15 FAST™ ICs
    - Drives 50 Transmission Lines
  • Characterized for operation from –40° to 85°C

FAST™ is a Trademark o f Fairchild Semiconductor.

  • Buffered Inputs
  • Exceeds 2kV ESD Protection MIL-STD-883, Method 3015
  • SCR-Latchup-Resistant CMOS Process and Circuit Design
  • Speed of Bipolar FAST™/AS/S with Significantly Reduced Power Consumption
  • Balanced Propagation Delays
  • AC Types Feature 1.5V to 5.5V Operation and Balanced Noise Immunity at 30% of the Supply
  • ±24mA Output Drive Current
    - Fanout to 15 FAST™ ICs
    - Drives 50 Transmission Lines
  • Characterized for operation from –40° to 85°C

FAST™ is a Trademark o f Fairchild Semiconductor.

The ’AC283 and ’ACT283 4-bit binary adders with fast carry that utilize Advanced CMOS Logic technology. These devices add two 4-bit binary numbers and generate a carry-out bit if the sum exceeds 15.

Because of the symmetry of the add function, this device can be used with either all active-HIGH operands (positive logic) or with all active-LOW operands (negative logic). When using positive logic, the carry-in input must be tied LOW if there is no carry-in.

The ’AC283 and ’ACT283 4-bit binary adders with fast carry that utilize Advanced CMOS Logic technology. These devices add two 4-bit binary numbers and generate a carry-out bit if the sum exceeds 15.

Because of the symmetry of the add function, this device can be used with either all active-HIGH operands (positive logic) or with all active-LOW operands (negative logic). When using positive logic, the carry-in input must be tied LOW if there is no carry-in.

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Technical documentation

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Type Title Date
* Data sheet 4-Bit Binary Fill Adder With Fast Carry datasheet (Rev. D) 17 May 2000
Application note Implications of Slow or Floating CMOS Inputs (Rev. E) 26 Jul 2021
Selection guide Logic Guide (Rev. AB) 12 Jun 2017
Application note Understanding and Interpreting Standard-Logic Data Sheets (Rev. C) 02 Dec 2015
User guide LOGIC Pocket Data Book (Rev. B) 16 Jan 2007
Application note Semiconductor Packing Material Electrostatic Discharge (ESD) Protection 08 Jul 2004
Application note Selecting the Right Level Translation Solution (Rev. A) 22 Jun 2004
Application note TI IBIS File Creation, Validation, and Distribution Processes 29 Aug 2002
Application note CMOS Power Consumption and CPD Calculation (Rev. B) 01 Jun 1997
Application note Designing With Logic (Rev. C) 01 Jun 1997
Application note Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc 01 Apr 1996

Design & development

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Evaluation board

14-24-LOGIC-EVM — Logic product generic evaluation module for 14-pin to 24-pin D, DB, DGV, DW, DYY, NS and PW packages

The 14-24-LOGIC-EVM evaluation module (EVM) is designed to support any logic device that is in a 14-pin to 24-pin D, DW, DB, NS, PW, DYY or DGV package,

User guide: PDF | HTML
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Package Pins Download
PDIP (N) 16 View options
SOIC (D) 16 View options

Ordering & quality

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