m Process
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The SN54ACT16651 and 74ACT16651 are 16-bit bus transceivers that consist of D-type flip-flops and control circuitry arranged for multiplexed transmission of data directly from the data bus or from the internal storage registers. These devices can be used as two 8-bit transceivers or one 16-bit transceiver.
Complementary output-enable (OEAB and 
) inputs are provided to control
the transceiver functions. Select-control (SAB and SBA) inputs are
provided to select whether real-time or stored data is transferred. A
low input level selects real-time data, and a high input level
selects stored data. The circuitry used for select control eliminates
the typical decoding glitch that occurs in a multiplexer during the
transition between stored and real-time data. Figure 1 illustrates
the four fundamental bus-management functions that can be performed
with the SN54ACT16651 and 74ACT16651.
Data on the A or B bus, or both, can be stored in the internal D
flip-flops by low-to-high transitions at the appropriate clock (CLKAB
or CLKBA) inputs regardless of the levels on the select-control or
output-enable inputs. When SAB and SBA are in the real-time transfer
mode, it is also possible to store data without using the internal
D-type flip-flops by simultaneously enabling OEAB and . In this configuration, each
output reinforces its input. Thus, when all other data sources to the
two sets of bus lines are at high impedance, each set of bus lines
remains at its last state.
The 74ACT16651 is packaged in TI's shrink small-outline package, which provides twice the I/O pin count and functionality of standard small-outline packages in the same printed-circuit-board area.
The SN54ACT16651 is characterized for operation over the full military temperature range of -55°C to 125°C. The 74ACT16651 is characterized for operation from -40°C to 85°C.
| Type | Title | Date | ||
|---|---|---|---|---|
| * | Data sheet | 16-Bit Transceivers And Registers With 3-State Outputs datasheet (Rev. A) | 01 Apr 1996 | |
| Application note | Implications of Slow or Floating CMOS Inputs (Rev. E) | 26 Jul 2021 | ||
| Selection guide | Logic Guide (Rev. AB) | 12 Jun 2017 | ||
| Application note | Understanding and Interpreting Standard-Logic Data Sheets (Rev. C) | 02 Dec 2015 | ||
| User guide | LOGIC Pocket Data Book (Rev. B) | 16 Jan 2007 | ||
| Application note | Semiconductor Packing Material Electrostatic Discharge (ESD) Protection | 08 Jul 2004 | ||
| Application note | Selecting the Right Level Translation Solution (Rev. A) | 22 Jun 2004 | ||
| Application note | TI IBIS File Creation, Validation, and Distribution Processes | 29 Aug 2002 | ||
| Application note | CMOS Power Consumption and CPD Calculation (Rev. B) | 01 Jun 1997 | ||
| Application note | Designing With Logic (Rev. C) | 01 Jun 1997 | ||
| Application note | Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc | 01 Apr 1996 |
For additional terms or required resources, click any title below to view the detail page where available.
| Package | Pins | Download |
|---|---|---|
| SSOP (DL) | 56 | View options |
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