This device is designed to have a fast transient response and be stable with 1-uF capacitors. This combination provides high performance at a reasonable cost.
Because the PMOS device behaves as a low-value resistor, the dropout voltage is very low (typically 170 mV at an output current of 200-mA for the TPS7433). This LDO family also features a sleep mode; applying a TTL high signal to EN\ (enable) shuts down the regulator, reducing the quiescent current to less than 1 uA at
TJ = 25°C.
The TPS74xx is offered in 1.5-V, 1.8-V, 2.5-V, 3-V, and 3.3-V. Output voltage tolerance is specified as a maximum of 3% over line, load, and temperature ranges. The TPS74xx family is available in 8 pin SOIC package.
| Type | Title | Date | ||
|---|---|---|---|---|
| * | Data sheet | Fast-Transient-Response Using Small Output Capacitor 200-mA Low-Dropout Voltage datasheet | 21 Dec 1999 | |
| Application note | LDO Noise Demystified (Rev. B) | PDF | HTML | 18 Aug 2020 | |
| Application note | LDO PSRR Measurement Simplified (Rev. A) | PDF | HTML | 09 Aug 2017 |
For additional terms or required resources, click any title below to view the detail page where available.
| Package | Pins | Download |
|---|---|---|
| SOIC (D) | 8 | View options |
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