SCAN926260

ACTIVE

Six 1 to 10 bus LVDS deserializers with IEEE 1149.1 and at-speed BIST

Product details

Protocols Catalog Rating Catalog Operating temperature range (°C) -40 to 85
Protocols Catalog Rating Catalog Operating temperature range (°C) -40 to 85
NFBGA (NZH) 196 225 mm² 15 x 15
  • Deserializes One to Six Bus LVDS Input Serial Data Streams with Embedded Clocks
  • IEEE 1149.1 (JTAG) Compliant and At-Speed BIST Test Modes
  • Parallel Clock Rate 16-66MHz
  • On Chip Filtering for PLL
  • High Impedance Inputs Upon Power Off (Vcc = 0V)
  • Single Power Supply at +3.3V
  • 196-Pin NFBGA Package (Low-Profile Ball Grid Array) Package
  • Industrial Temperature Range Operation: −40°C to +85°C
  • ROUTn[0:9] and RCLKn Default High when Channel is Not Locked
  • Powerdown Per Channel to Conserve Power on Unused Channels

All trademarks are the property of their respective owners.

  • Deserializes One to Six Bus LVDS Input Serial Data Streams with Embedded Clocks
  • IEEE 1149.1 (JTAG) Compliant and At-Speed BIST Test Modes
  • Parallel Clock Rate 16-66MHz
  • On Chip Filtering for PLL
  • High Impedance Inputs Upon Power Off (Vcc = 0V)
  • Single Power Supply at +3.3V
  • 196-Pin NFBGA Package (Low-Profile Ball Grid Array) Package
  • Industrial Temperature Range Operation: −40°C to +85°C
  • ROUTn[0:9] and RCLKn Default High when Channel is Not Locked
  • Powerdown Per Channel to Conserve Power on Unused Channels

All trademarks are the property of their respective owners.

The SCAN926260 integrates six 10-bit deserializer devices into a single chip. The SCAN926260 can simultaneously deserialize up to six data streams that have been serialized by TI’s 10-bit Bus LVDS serializers. In addition, the SCAN926260 is compliant with IEEE standard 1149.1 and also features an At-Speed Built-In Self Test (BIST). For more details, please see the sections titled IEEE 1149.1 Test Modes and BIST Alone Test Modes.

Each deserializer block in the SCAN926260 has it’s own powerdown pin (PWRDWN[n])and operates independently with its own clock recovery circuitry and lock-detect signaling. In addition, a master powerdown pin (MS_PWRDWN) which puts all the entire device into sleep mode is provided.

The SCAN926260 uses a single +3.3V power supply and consumes 1.2W at 3.3V with a PRBS-15 pattern on all channels at 660Mbps.

The SCAN926260 integrates six 10-bit deserializer devices into a single chip. The SCAN926260 can simultaneously deserialize up to six data streams that have been serialized by TI’s 10-bit Bus LVDS serializers. In addition, the SCAN926260 is compliant with IEEE standard 1149.1 and also features an At-Speed Built-In Self Test (BIST). For more details, please see the sections titled IEEE 1149.1 Test Modes and BIST Alone Test Modes.

Each deserializer block in the SCAN926260 has it’s own powerdown pin (PWRDWN[n])and operates independently with its own clock recovery circuitry and lock-detect signaling. In addition, a master powerdown pin (MS_PWRDWN) which puts all the entire device into sleep mode is provided.

The SCAN926260 uses a single +3.3V power supply and consumes 1.2W at 3.3V with a PRBS-15 pattern on all channels at 660Mbps.

Download View video with transcript Video

Technical documentation

star =Top documentation for this product selected by TI
No results found. Please clear your search and try again.
View all 1
Type Title Date
* Data sheet SCAN926260 Six 1-10 Bus LVDS Deserializers w/IEEE 1149.1 & At-Speed BIST datasheet (Rev. H) 17 Apr 2013

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Simulation tool

PSPICE-FOR-TI — PSpice® for TI design and simulation tool

PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
Simulation tool

TINA-TI — SPICE-based analog simulation program

TINA-TI provides all the conventional DC, transient and frequency domain analysis of SPICE and much more. TINA has extensive post-processing capability that allows you to format results the way you want them. Virtual instruments allow you to select input waveforms and probe circuit nodes voltages (...)
User guide: PDF
Package Pins Download
NFBGA (NZH) 196 View options

Ordering & quality

Information included:
  • RoHS
  • REACH
  • Device marking
  • Lead finish/Ball material
  • MSL rating/Peak reflow
  • MTBF/FIT estimates
  • Material content
  • Qualification summary
  • Ongoing reliability monitoring
Information included:
  • Fab location
  • Assembly location

Support & training

TI E2E™ forums with technical support from TI engineers

Content is provided "as is" by TI and community contributors and does not constitute TI specifications. See terms of use.

If you have questions about quality, packaging or ordering TI products, see TI support. ​​​​​​​​​​​​​​

Videos